We are partnered with a global leader in the semiconductor industry. Our client develops advanced Audio products are designed to offer premium wireless connectivity, high levels of integration, immersive sound quality, and on-device AI for smart audio and context aware applications. An ultra-low power subsystem within a low power SoC; a chip-within-a-chip HW block incorporating multiple always-on IP's, design execution within this group requires solving ground-breaking challenges and multiple power domain crossing issues.
Currently they are looking for an ASIC Design Verification Engineer's of all levels, to be part of their team to innovate and design complex leading, ultra-low power, solutions for audio and context aware applications.
- Contribute to core verification during the pre/post silicon phase of next generation ASICs through simulation
- Drive test plan development, execution and verification closure in conjunction with the design and verification teams
- Contribute to creating/maintaining a test bench, assertions, and functional coverage models with scalability and reuse as key goals
- Contribute to implementing flows to automate development processes. Identify areas for improvement and drive them to completion
- Lead complex debug activities through the development cycle (pre and post-silicon)
- Provide technical supervision to other engineers and have the ability to lead by example
- Work closely with design to define verification methodology, Provide test plans and develop required tests.
- Professional or academic ASIC hardware design and/or implementation experience. New graduates should have ASIC design internship or co-op experience.
- Proficiency with Verilog/VHDL RTL design languages and ability to write clean, readable, synthesizable RTL.
- Good understanding of ASIC/VLSI concepts
- Detail oriented with strong analytical and debugging skills
- Bachelor's degree in Science, Engineering, or related field
- Ability to work legally in Canada
- 2+ years ASIC design, verification, or related work experience.
- Hardware verification languages (HVL): SystemVerilog testbench (UVM), and/or SystemC, Hardware description languages (HDL): Verilog and SystemVerilog
- Good working experience with C (basic level or C++ sufficient)
- Knowledge in one or more of the following disciplines is preferred: Audio (MP3, MIDI, etc.), Bus/interconnect (AHB, AXI), CPU (ARM v8/v7, Cache, MMU, security, etc.).
- Strong knowledge of digital circuits and event-driven simulators
- Knowledge of Perl, tcsh, Python and GNU Make is a strong asset
- Experience with automotive safety concepts and standards such as ISO26262
• Bachelor's degree in Science, Engineering, or related field.
How to Apply?
All qualified and interested applicants can apply directly to Aaron Ravensbergen by sending an email with attached resume to Aaron.firstname.lastname@example.org. You may also apply directly on our website at www.talentlab.com. Although we thank all applicants for their interest, only those in consideration will be contacted.