We are partnered with a growing, privately held technology company. As they continue to fuel their growth our client is looking for a DFT Engineer to join their new SoC team. The organization is built around 20 years of expertise in delivering connectivity Silicon IP solutions which has led to the most power efficient and high-performance solution available on the market.
As a DFT Engineer you will be responsible for the following;
- Scan insertion, scan chain compression, ATPG
- Memory BIST
- On chip clocking
- DFT verification/simulation (RTL and gate level)
- DFT logic RTL design/verification (OCC blocks, TDRs, etc)
This is the perfect opportunity to join a team of leaders in the industry who are invested in your growth and development.
How to Apply?
All qualified and interested applicants can apply directly to Aaron Ravensbergen by sending an email with attached resume to Aaron.email@example.com
. You may also apply directly on our website at www.talentlab.com
. Although we thank all applicants for their interest, only those in consideration will be contacted.