Our exciting start-up client is looking for a talented engineer to join their team of difference makers. As part of the engineering team, you will be responsible for leading the development of place-and-route flows and methodologies in multiple processes all the way down to 7nm. You will be required to think outside the box and push the PnR tools to their limits.. They are located downtown Toronto where the hardware action is!
- Degree in Electrical Engineering
- 5+ years of relevant experience in place and route
- Experience in flow development and automation
- Must have direct experience in FinFET CMOS
- Experienced in synthesis, Place & Route, timing closure, PV, PI, PPA improvement \
- EDA tool knowlege including Cadence, Synopsys and Mentor tools
- Solid understanding of synthesis, timing driven layout and post-layout timing analysis of deep sub-micron designs is essential.
- Experience in tcl/perl/shell/python programming,
- Experience with DRC/LVS/EMIR analysis.
- Mentor Calibre DRC/LVS/PERC, and Apache Totem EM&IR analysis is a plus