Analog IC Layout Engineer – New Graduate

Location: Markham, Ontario
Employment Type: 12-Month Contract, with potential for renewal or extension

The Opportunity

TalentLab is working with a leading global semiconductor company to hire an early-career Analog IC Layout Engineer for its engineering team in Markham.

This is an excellent opportunity for a recent Electrical or Computer Engineering graduate looking to begin their career in semiconductor design. You’ll work alongside experienced IC designers and layout engineers on advanced analog and mixed-signal integrated circuits, gaining hands-on experience with real production silicon.

Candidates who have completed a PEY, co-op, internship, or other practical experience in analog IC layout or semiconductor design will be particularly well suited to the role.

What You’ll Be Doing

• Develop and modify analog and mixed-signal IC layouts under the guidance of senior engineers.

• Translate circuit schematics into physical layouts while considering performance, matching, parasitics, reliability, and manufacturability.

• Perform physical verification including DRC (Design Rule Check) and LVS (Layout Versus Schematic).

• Work with IC design engineers to understand circuit requirements and optimize layouts accordingly.

• Support layout reviews, debugging, verification, and design iterations.

• Gain exposure to advanced semiconductor process technologies and industry-standard IC design tools.

• Collaborate with experienced engineers in a highly technical semiconductor development environment.

What We’re Looking For

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Microelectronics, or a closely related field.

• Recent graduates and candidates completing their degree are encouraged to apply.

• Academic or practical exposure to analog IC design, analog layout, VLSI, CMOS, or semiconductor device design.

• Familiarity with IC layout concepts such as matching, symmetry, parasitic effects, routing, device placement, and design rules.

• Exposure to Cadence Virtuoso or similar IC design/layout tools is strongly preferred.

• Understanding of DRC and LVS verification.

• Strong problem-solving skills and attention to detail.

• Co-op, PEY, internship, research, or project experience involving analog IC layout is highly desirable.

Why This Role?

For a new graduate interested in analog semiconductor design, this is an opportunity to move directly into hands-on IC layout work with an established semiconductor engineering team. You’ll gain practical experience with production designs, advanced design tools, and experienced engineers while building a strong foundation for a career in analog and mixed-signal IC development.

This is an initial 12-month contract with the potential for renewal or extension based on business needs and performance.

How to Apply?
All qualified and interested applicants can apply directly to Gord Marriage by sending an email with attached resume to gord.marriage@talentlab.com. You may also apply directly on our website at www.talentlab.com. Although we thank all applicants for their interest, only those in consideration will be contacted.